During the development of computer technology, the access speed of a main memory has always been much slower than the processing speed of a central processing unit CPU. Consequently, high-speed processing capacity of the CPU cannot be fully exploited, adversely affecting the working efficiency of the entire computer system. In order to alleviate the mismatching between the processing speed of the CPU and the access speed of the main memory, one of the commonly used approaches is to adopt a cache memory in the storage hierarchy. A cache memory is a single-level memory existing between the main memory and the CPU, which has a relatively small capacity but an access speed much higher than the access speed of the main memory, being close to the processing speed of the CPU.
However, in current practical applications, in spite of a cache memory provided between the main memory and the CPU, there is still a problem that the system performance is seriously degraded when a large number of I/O operations are performed on the cache memory. For example, when a large number of I/O write operations are performed on the cache memory, all the data is usually written into the cache memory, regardless of the amount of data being written. When the amount of data being written to the cache memory is large (for example, greater than 250 K), the cache memory tends to be fully written since the capacity thereof is relatively small, resulting in a serious drop of the overall system performance.